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Silicon Labs /Series1 /EFM32GG12B /EFM32GG12B510F1024GQ100 /MSC /IEN

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Interpret as IEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ERASE)ERASE 0 (WRITE)WRITE 0 (CHOF)CHOF 0 (CMOF)CMOF 0 (PWRUPF)PWRUPF 0 (ICACHERR)ICACHERR 0 (WDATAOV)WDATAOV 0 (LVEWRITE)LVEWRITE 0 (RAMERR1B)RAMERR1B 0 (RAMERR2B)RAMERR2B 0 (RAM1ERR1B)RAM1ERR1B 0 (RAM1ERR2B)RAM1ERR2B 0 (RAM2ERR1B)RAM2ERR1B 0 (RAM2ERR2B)RAM2ERR2B

Description

Interrupt Enable Register

Fields

ERASE

ERASE Interrupt Enable
WRITE

WRITE Interrupt Enable
CHOF

CHOF Interrupt Enable
CMOF

CMOF Interrupt Enable
PWRUPF

PWRUPF Interrupt Enable
ICACHERR

ICACHERR Interrupt Enable
WDATAOV

WDATAOV Interrupt Enable
LVEWRITE

LVEWRITE Interrupt Enable
RAMERR1B

RAMERR1B Interrupt Enable
RAMERR2B

RAMERR2B Interrupt Enable
RAM1ERR1B

RAM1ERR1B Interrupt Enable
RAM1ERR2B

RAM1ERR2B Interrupt Enable
RAM2ERR1B

RAM2ERR1B Interrupt Enable
RAM2ERR2B

RAM2ERR2B Interrupt Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data